AI chipmakers are exploring glass interposers because larger AI packages need more connections, better signal performance, and cost-effective manufacturing. Glass offers larger panel formats, lower dielectric loss, and tunable thermal expansion than traditional silicon interposers. However, thermal conductivity, warpage control, and manufacturing maturity remain challenges.
In This Article
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What Is an Interposer in Chip Packaging?
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Why Silicon Interposers Are Reaching Their Limits
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Glass Interposer vs Silicon Interposer: Key Differences
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Glass Interposer vs Glass Core Substrate
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Key Enabling Technologies
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Who Is Investing and What Comes Next?
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Frequently Asked Questions
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What Is an Interposer in Chip Packaging?
An interposer is an intermediate layer that connects multiple chips to a package substrate. It enables communication between processors, chiplets, and High Bandwidth Memory (HBM).
Modern AI processors require high-speed connections between multiple components. An interposer provides these connections through dense electrical wiring. Across complex semiconductor packages it also supports power distribution.
How Interposers Enable 2.5D and 3D Packaging
Interposers support advanced packaging techniques such as 2.5D and 3D integration. In 2.5D packaging, multiple semiconductor dies sit side by side on an interposer. In 3D packaging, manufacturers stack dies vertically to improve integration.
These approaches allow for heterogeneous integration. Different chiplets can be combined in a single package by the manufacturer. Each chiplet performs a specific function, like memory or processing operations. This architecture improves design flexibility and supports high performance computing. For advanced chiplet technology it is also increasing demand.
Why Silicon Interposers Are Reaching Their Limits
Silicon interposers face cost and size limitations as AI packages become larger. Their manufacturing process relies primarily on round semiconductor wafers. This restricts the available manufacturing area and increases costs for large packages.
For multiple HBM stacks AI accelerators also require connections. These packages need high-density routing and reliable signal transmission. Expanding conventional silicon interposers can make manufacturing more complex.
Organic substrates provide larger package formats but introduce another challenge. They can experience warpage during manufacturing and thermal processing. This can affect alignment and package reliability.
For these requirements glass offers an alternative. It supports larger panel formats and provides favorable electrical properties. Its thermal expansion can also be adjusted through material composition. However, glass still requires improvements in manufacturing reliability and thermal management.
Glass Interposer vs Silicon Interposer: Key Differences
Glass and silicon interposers have the same function, but different material properties, manufacturing processes and scalability. Silicon has well established manufacturing capabilities and good thermal conductivity. Glass provides electrical insulation, low dielectric loss and the ability to make larger packages.
| Attribute | Glass Interposer | Silicon Interposer |
| Base format | Wafer and panel-based | Round silicon wafers |
| Package size | Supports larger packages | Limited by wafer size |
| Signal loss | Lower signal loss | Higher signal loss |
| Fine-line RDL | Developing capabilities | Established capabilities |
| Thermal conductivity | Lower | Higher |
| Warpage and CTE | Adjustable CTE | Fixed CTE |
| Cost per area | Potentially lower | Generally higher for large packages |
| Manufacturing maturity | Emerging technology | Mature technology |
For next-generation semiconductor packaging glass offers several advantages. Its electrical insulation properties support high-speed signal transmission. Its thermal expansion can also be tailored to improve compatibility with surrounding materials.
However, glass has lower thermal conductivity than silicon. For high-performance AI processors this creates additional heat-management requirements. Glass is also brittle, making handling and manufacturing reliability important considerations.
Silicon is competitive due to its established processes and thermal properties. It also has fine-line routing capabilities for complex semiconductor designs. The choice depends on package dimensions, electrical requirements, thermal performance, and production economics.
Glass Interposer vs Glass Core Substrate
Glass interposers and glass core substrates perform different functions within semiconductor packages. Both use glass but replace different materials.
A glass interposer replaces the traditional silicon interposer between semiconductor dies and the package substrate. It connects processors, chiplets, and memory through dense electrical connections.
An organic core in a conventional package substrate is replaced by a glass core substrate. Provides structural support and dimensional stability in large packages. As manufacturers explore new materials for next-generation semiconductor packaging these developments are also creating opportunities in the advanced IC substrates market.
The distinction is important for advanced packaging strategies. Glass interposers improve chip-to-chip connectivity. At the package-substrate level glass core substrates address structural and manufacturing challenges.
Key Enabling Technologies
Three technologies support the development of glass interposers: through-glass vias, redistribution layers, and glass panel-level packaging.
Through-Glass Vias (TGV)
Through-glass vias are vertical electrical connections formed through glass substrates. Manufacturers create small openings and fill them with conductive materials, typically copper.
These connections transmit electrical signals and power from one substrate layer to another substrate layer. TGVs enable high-density interconnections in advanced semiconductor packages.
Redistribution Layers (RDL)
Thin metal wiring structures formed on substrate surfaces is referred as redistribution layers. They route electrical connections between semiconductor dies and external connections.
Fine-line RDL technology supports dense chiplet integration. It also helps manage the growing number of connections required by AI processors.
Glass Panel-Level Packaging (PLP)
Glass panel-level packaging uses large rectangular panels instead of conventional round wafers. Within a single processing area this manufacturing approach can accommodate more package units.
Larger panels offer opportunities to improve material utilization and reduce production costs per package. However, handling, alignment, and warpage control remain important challenges.
Who Is Investing and What Comes Next?
Semiconductor producers and materials suppliers are putting a lot of money into glass packaging technologies. Their efforts focus on improving manufacturing reliability and supporting larger AI chip designs.
Intel demonstrated progress in January 2026. The company showcased a sample combining its Embedded Multi-die Interconnect Bridge (EMIB) technology with a glass core substrate at NEPCON Japan. The sample supported a chip package twice the reticle size. Intel also reported no microcracking during testing. This development represents progress toward commercial applications in glass substrate.
Key companies in the glass interposers market include:
AGC Inc.: Develops specialty glass materials and glass substrates for semiconductor applications.
Corning Incorporated: Develops advanced glass materials for electronics and semiconductor applications.
Intel Corporation: Advances glass substrate technology for next-generation semiconductor packaging.
Samsung Electro-Mechanics: Develops advanced package substrates and glass core technologies.
SCHOTT AG: Supplies specialty glass materials for semiconductor and electronic applications.
Trade policies are also affecting semiconductor supply chains. Section 232 measure announced by the United States on 14 January 2026. It imposed a 25% tariff on some advanced computing chips and derivative products. The measure became effective January 15, 2026. Certain exemptions apply to qualifying imports and applications. These changes can influence sourcing strategies and semiconductor manufacturing investments.
Glass Interposers Market Outlook
According to Polaris Market Research, the global glass interposers market was valued at USD 0.14 billion in 2025. It is projected to reach USD 0.41 billion by 2034. The market is expected to register a CAGR of 12.63% during 2026–2034.
Demand for AI accelerators, HBM, and chiplet architectures is creating new opportunities. Glass interposers could support larger packages and high-density connections. Manufacturing improvements will determine the pace of commercial adoption.
Explore the latest market developments and competitive landscape with Polaris Market Research. Request a sample of the Glass Interposers Market report to access detailed market insights and forecasts.
Frequently Asked Questions
What is a glass interposer?
A glass interposer is a thin glass layer that connects chiplets and memory to the package substrate. It uses through-glass vias and redistribution layers to establish electrical connections. This technology supports advanced semiconductor packaging.
Is glass better than silicon for interposers?
Glass provides larger panel sizes, low dielectric loss and tunable thermal expansion. Silicon has higher thermal conductivity and more mature manufacturing processes. The suitable material depends on package size and performance requirements.
What is a through-glass via (TGV)?
A through-glass via is a vertical electrical connection through a layer of glass. In a TGV, signal and power are usually carried in copper between layers of substrate. They support high-density connections in advanced semiconductor packages.
What is the difference between a glass interposer and a glass core substrate?
A glass core substrate replaces the organic core of a package substrate. A glass interposer replaces the silicon interposer between semiconductor dies and the package substrate. Both use glass but serve different packaging functions.
When will glass substrates reach volume production?
Industry roadmaps indicate wider adoption in the late 2020s. Early samples and pilot manufacturing programs are in progress. Production timelines will depend on manufacturing yields, TGV reliability, and warpage control.
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